CHINESE JOURNAL OF COMPUTATIONAL PHYSICS ›› 2012, Vol. 29 ›› Issue (4): 580-584.

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A Thermal Model for Top Layer of Three-dimensional Integrated Circuits with Through Silicon Via

WANG Fengjuan, ZHU Zhangming, YANG Yintang, WANG Ning   

  1. School of Microelectronics, Xidian University, Xi'an 710071, China
  • Received:2011-08-29 Revised:2011-12-03 Online:2012-09-25 Published:2012-09-25

Abstract: With through silicon via(TSV) area scale factor r,an analytical thermal model for top layer of three-dimensional integrated circuits(3D IC) taking TSV into account was proposed.It is shown that temperature is lower after considering TSVs under same working conditions;the greater the scale factor r,the lower the temperature is;For more layers and smaller r,temperature increases sharply with decrease of r;The best range of TSV area ratio factor r is 0.5% to 1% for an 8-layer 3D IC.

Key words: three-dimensional integrated circuit, through silicon via, thermal model, top layer, thermal management

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