Abstract: With consideration of via effect and heat fringing effect, a thermoelectric simulation method is proposed which modifies node heat flow due to temperature distribution. Based on thermoelectric duality, thermal resistance models including inner/inter-layer and vias are presented. Take advantage of feedback relationship between heat and electric, the node network heat flow model is modified with temperature distribution. Multilevel interconnects temperature distribution with polymer and silicon oxide as insulator dielectric are analyzed. Compared with results of finite element, the relative standards deviation of the proposed method can be reduced by 71.2% and 12. 9% respectively than those of available models. With consideration of via effect and heat fringing effect, we calculate peak temperature rise in different technology nodes. It shows that interconnect temperature distribution is overestimated in traditional models.

Key words: thermal resistance, temperature distribution, thermoelectric simulation, via effect, fringing effect