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A Thermal Model for Top Layer of Three-dimensional Integrated Circuits with Through Silicon Via
WANG Fengjuan, ZHU Zhangming, YANG Yintang, WANG Ning
CHINESE JOURNAL OF COMPUTATIONAL PHYSICS
2012, 29 (4):
580-584.
With through silicon via(TSV) area scale factor r,an analytical thermal model for top layer of three-dimensional integrated circuits(3D IC) taking TSV into account was proposed.It is shown that temperature is lower after considering TSVs under same working conditions;the greater the scale factor r,the lower the temperature is;For more layers and smaller r,temperature increases sharply with decrease of r;The best range of TSV area ratio factor r is 0.5% to 1% for an 8-layer 3D IC.
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